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Journal paper highlights:

JSSC (13 papers): [J04], [J05], [J06], [J09], [J12], [J13], [J15], [J17], [J19], [J23], [J29], [J42], [J44]

TCAS-I (8 paper): [J25], [J30], [J36], [J37], [J38], [J40], [J41], [J45]

TCAS-II (11 papers): [J08], [J12], [J14], [J20], [J21], [J22], [J26], [J32], [J33], [J34]

[J45] Zhizhan Yang, Haochen Zhang, Jun Yin, Rui P. Martins, Pui-In Mak, “An 840-to-970 MHz Multimodal Wake-up Receiver with a Q-equalized Antenna-ED Interface and 2-dimensional Wake-up Identification,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. xx, no. xx, pp. xxxx-xxxx, xxx. 2024. [Download][IEEE Xplore link]

[J44] Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui P. Martins and Pui-In Mak, “A 23.2-to-26GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase Alignment,IEEE Journal of Solid-State Circuits (JSSC), vol. xx, no. xx, pp. xxxx-xxxx, xxx. 2024. [Download][IEEE Xplore link]

[J43] Zhizhan Yang, Jun Yin, Rui P. Martins, Pui-In Mak, “Complementary Drain-Grounded VCO-PA Improving Transmit Efficiency Over a Wide EIRP Range,IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 71, no. 10, pp. 4422-4426, Oct. 2024. [Download][IEEE Xplore link]

[J42] Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Rui P. Martins, Pui-In Mak, “A ULP Long-Range Active-RF Tag With Automatically Calibrated Antenna–TRX Interface,IEEE Journal of Solid-State Circuits (JSSC), vol. xx, no. xx, pp. xxxx-xxxx, xxx. 2024. [Download][IEEE Xplore link]

[J41] Xi Meng, Haoran Li, Peng Chen, Jun Yin, Pui-In Mak, and Rui P. Martins, “Analysis and Design of a 15.2-to-18.2-GHz Inverse-Class-F VCO With a Balanced Dual-Core Topology Suppressing the Flicker Noise Upconversion,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 70, no. 12, pp. 5110-5123, Dec. 2023. [Download][IEEE Xplore link]

[J40] Tailong Xu, Shenke Zhong, Jun Yin, Pui-In Mak, and Rui P. Martins, “A 6-to-7.5-GHz 54-fs rms Jitter Type-II Reference-Sampling PLL Featuring a Gain-Boosting Phase Detector for In-Band Phase-Noise Reduction,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 69, no. 12, pp. 4774-4786, Dec. 2022. [Download][IEEE Xplore link]

[J39] Xiaoqi Lin, Jun Yin, Pui-In Mak, and Rui P. Martins, “A Swing-Enhanced Class-D VCO Using a Periodically Time-Varying (PTV) Inductor,” IEEE Solid-State Circuits Letters (SSC-L), vol. 5, pp. 25-28, Feb. 2022. [Download][IEEE Xplore link]

[J38] Yueduo Liu, Rongxin Bao, Zihao Zhu, Shiheng Yang, Xiong Zhou, Jun Yin, Pui-In Mak, and Qiang Li, “Accurate Performance Evaluation of Jitter-Power FOM for Multiplying Delay-Locked Loop,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 69, no. 2, pp. 495-505, Feb. 2022. [Download][IEEE Xplore link]

[J37] Peng Chen, Jun Yin, Feifei Zhang, Pui-In Mak, Rui P. Martins, and R. B. Staszewski, “Mismatch Analysis of DTCs with an Improved BIST-TDC in 28nm CMOS,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 69, no. 1, pp. 196-206, Jan. 2022. [Download][IEEE Xplore link]

[J36] Peng Chen, Xi Meng, Jun Yin, Pui-In Mak, Rui P. Martins, and R. B. Staszewski, “A 529-μW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 69, no. 1, pp. 51-63, Jan. 2022. [Download][IEEE Xplore link]

[J35] Rui P. Martins, Pui-In Mak, Sai-Weng Sin, Man-Kay Law, Yan Zhu, Yan Lu, Jun Yin, Chi-Hang Chan, Yong Chen, Ka-Fai Un, Mo Huang, Minglei Zhang, Yang Jiang and Wei-Han Yu, “Revisiting the Frontiers of Analog and Mixed-Signal Integrated Circuits Architectures and Techniques towards the future Internet of Everything (IoE) Applications”, Foundations and Trends® in Integrated Circuits and Systems: Vol. 1: No. 2-3, pp 72-216, Nov. 2021. [Download][Link]

[J34] Shiheng Yang, Jun Yin, Tailong Xu, Taimo Yi, Pui-In Mak, Qiang Li, and Rui P. Martins, “A 600-µm2 Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS,” IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 68, no. 9, pp. 3108-3112, Sep. 2021. [Download][IEEE Xplore link]

[J33] Gabriel Chong, Harikrishnan Ramiah, Jun Yin, Jagadheswaran Rajendran, Pui-In Mak, and Rui P. Martins, “A Wide-PCE-Dynamic-Range CMOS Cross-Coupled Differential-Drive Rectifier for Ambient RF Energy Harvesting,” IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 68, no. 6, pp. 1743-1747, Jun. 2021. [Download][IEEE Xplore link]

[J32] Selvakumar Mariappan, Jagadheswaran Rajendran, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, and Rui P. Martins, “An 800 MHz-to-3.3 GHz 20-MHz Channel Bandwidth WPD CMOS Power Amplifier For Multiband Uplink Radio Transceivers,” IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 68, no. 4, pp. 1178-11182, Apr. 2021. [Download][IEEE Xplore link]

[J31] Rui P. Martins, Pui-In Mak, Chi-Hang Chan, Jun Yin, Yan Zhu, Yong Chen, Yan Lu, Man-Kay Law, Sai-Weng Sin, “Bird’s-eye view of analog and mixed-signal chips for the 21st century,” International Journal of Circuit Theory and Applications, Vol. 49, No. 3, pp 746-761, Feb. 2021. [Download][Wiley Link]

[J30] Ricardo Martins, Nuno Lourenço, Nuno Horta, Shenke Zhong, Jun Yin, Pui-In Mak, and Rui P. Martins, “Design of a 4.2-to-5.1 GHz Ultralow-Power Complementary Class-B/C Hybrid-Mode VCO in 65-nm CMOS Fully Supported by EDA Tools,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 67, no. 11, pp. 3965-3977, Nov. 2020. [Download][IEEE Xplore link]

[J29] Kai Xu, Jun Yin, Pui-In Mak, Robert Bogdan Staszewski, and Rui P. Martins, “A Single-Pin Antenna Interface RF Front End Using a Single-MOS DCO-PA and a Push-Pull LNA,” IEEE Journal of Solid-State Circuits (JSSC), vol. 55, no. 8, pp. 2055-2068, Aug. 2020. [Download][IEEE Xplore link]

[J28] Nandini Vitee, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, and Rui P. Martins, “A 1-V 4-mW Differential-Folded Mixer With Common-Gate Transconductor Using Multiple Feedback Achieving 18.4-dB Conversion Gain, +12.5-dBm IIP3, and 8.5-dB NF,”  IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 5, pp. 1164-1174, May 2020. [Download][IEEE Xplore link]

[J27] Nandini Vitee, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, and Rui P. Martins, “A 3.15-mW +16.0-dBm IIP3 22-dB CG Inductively Source Degenerated Balun-LNA Mixer With Integrated Transformer-Based Gate Inductor and IM2 Injection Technique,”  IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 3, pp. 700-713, Mar. 2020. [Download][IEEE Xplore link]

[J26] Gabriel Chong, Harikrishnan Ramiah, Jun Yin, Jagadheswaran Rajendran, Wong Wei Ru, Pui-In Mak, and Rui P. Martins, “CMOS Cross-Coupled Differential-Drive Rectifier in Subthreshold Operation for Ambient RF Energy Harvesting-Model and Analysis,” IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 66, no. 12, pp. 1942-1946, Dec. 2019. [Download][IEEE Xplore link]

[J25] Ka-Fai Un, Gengzhen Qi, Jun Yin, Shiheng Yang, Shupeng Yu, Chio-In Ieong, Pui-In Mak, and Rui P. Martins, “A 0.12-mm² 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8-μs Settling Time for Multi-ISM-Band ULP Radios,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 66, no. 9, pp. 3307-3316, Sep. 2019. [Download][IEEE Xplore link]

[J24] Zechariah Balan, Harikrishnan Ramiah, Jagadheswaran Rajendran, Nandini Viteea, Pravinah Nair Shasidharan, Jun Yin, Pui-In Mak, Rui P.Martins, “A coin-battery-powered LDO-Free 2.4-GHz Bluetooth Low Energy/ZigBee receiver consuming 2 mA,”  Elsevier the VLSI Journal – Integration, vol. 66, issue 3, pp. 112-118, May. 2019. [Download][Elsevier link]

[J23] Shiheng Yang, Jun Yin, Haidong Yi, Wei-Han Yu, Pui-In Mak, and Rui P. Martins, “A 0.2-V Energy-Harvesting BLE Transmitter with a Micropower Manager Achieving 25% System Efficiency at 0-dBm Output and 5.2-nW Sleep Power in 28-nm CMOS,” IEEE Journal of Solid-State Circuits (JSSC), vol. 54, no. 5, pp. 1351-1362, May. 2019. [Download][IEEE Xplore link]

[J22] Iat-Fai Sun, Jun Yin, Pui-In Mak, and Rui P. Martins, “A Comparative Study of 8-Phase Feedforward-Coupling Ring VCOs,” IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 66 no. 4, pp. 527 -531, Apr. 2019. [Download][IEEE Xplore link]

[J21] Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui-In Mak, and Rui P. Martins, “A 5.1-to-7.3 mW, 2.4-to-5 GHz Class-C Mode-Switching Single-Ended-Complementary VCO Achieving >190 dBc/Hz FoM,” IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 66 no. 2, pp. 237 -241, Feb. 2019. [Download][IEEE Xplore link]

[J20] Tongquan Jiang, Jun Yin, Pui-In Mak, and Rui P. Martins, “A 0.5-V 0.4-to-1.6-GHz 8-Phase Bootstrap Ring-VCO Using Inherent Non-Overlapping Clocks Achieving a 162.2-dBc/Hz FoM,” IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 66 no. 2, pp. 157 -161, Feb. 2019. [Download][IEEE Xplore link]

[J19]  Shiheng Yang, Jun Yin, Pui-In Mak, and Rui P. Martins, “A 0.0056-mm² -249-dB-FoM All-Digital MDLL Using a Block-Sharing Offset-Free Frequency-Tracking Loop and Dual Multiplexed-Ring VCOs,” IEEE Journal of Solid-State Circuits (JSSC), vol. 54, no. 1, pp. 88-98, Jan. 2019. [Download][IEEE Xplore link]

[J18] Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak and Rui P. Martins, “Many-Objective Sizing Optimization of a Class-C/D VCO for Ultralow-Power IoT and Ultralow- Phase-Noise Cellular Applications,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, no. 1, pp. 69-82, Jan. 2019. [Download][IEEE Xplore link]

[J17] Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui–In Mak, and Rui P. Martins, “An Inverse-Class-F CMOS Oscillator With Intrinsic-High-Q First Harmonic and Second Harmonic Resonances,” IEEE Journal of Solid-State Circuits (JSSC), vol. 53 no. 12, pp. 3528 -3593, Dec. 2018. [Download][IEEE Xplore link]

[J16] Gabriel Chong, Harikrishnan Ramiah, Jun Yin, Jagadheswaran Rajendran, Wong Wei Ru, Pui-In Mak, and Rui P. Martins, “Ambient RF energy harvesting system: a review on integrated circuit design,” Springer Analog Integrated Circuits and Signal Processing, vol. 97, issue 3, pp. 515-531, Dec. 2018. [Download][Springer link]

[J15] Yatao Peng, Jun Yin, Pui-In Mak, and Rui P. Martins, “Low-Phase-Noise Wideband Mode-Switching Quad-Core-Coupled mm-wave VCO Using a Single-Center-Tapped Switched Inductor,” IEEE Journal of Solid-State Circuits (JSSC), vol. 53, no. 11, pp. 3232-3242, Nov. 2018. [Download][IEEE Xplore link]

[J14] Xinqiang Peng, Jun Yin, Wei-Han Yu, Pui-In Mak, and Rui P. Martins, “A Coin-Battery-Powered LDO-Free 2.4-GHz Bluetooth Low-Energy Transmitter with 34.7% Peak System Efficiency,” IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 65 no. 9, pp. 1174-1178, Sept. 2018. [Download][IEEE Xplore link]

[J13] Haidong Yi, Wei-Han Yu, Pui-In Mak, Jun Yin, and Rui P. Martins, “A 0.18V 382μW Bluetooth Low-Energy (BLE) Receiver Front-End with 1.33nW Sleep Power for Energy-Harvesting Applications in 28nm CMOS,” IEEE Journal of Solid-State Circuits (JSSC), vol. 53, no. 6, pp. 1618-1627, Jun. 2018. [Download][IEEE Xplore link]

[J12] Haidong Yi, Jun Yin, Pui-In Mak, and Rui P. Martins, “A 0.032-mm2 0.15-V 3-Stage Charge-Pump Scheme Using a Differential Bootstrapped Ring-VCO for Energy-Harvesting Applications,” IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 63, no. 2, pp. 146-150 , Feb. 2018. [Download][IEEE Xplore link]

[J11] Xingqiang Peng, Jun Yin, Pui-In Mak, Wei-Han Yu, and R. P. Martins, “A 2.4-GHz ZigBee Transmitter Using a Function-Reuse Class-F DCO-PA and an ADPLL Achieving 22.6% (14.5%) System Efficiency at 6-dBm (0-dBm) Pout,” IEEE Journal of Solid-State Circuits (JSSC), vol. 52, no. 6, pp. 1495-1508, Jun. 2017. [Download][IEEE Xplore link]

[J10] Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui-In Mak, and Rui P. Martins, “LC-VCOs using spiral inductors with single- and dual-layer patterned floating shields: a comparative study,” Springer Analog Integrated Circuits and Signal Processing, vol. 91, issue 3, pp. 497-502, Jun. 2017. [Download][Springer link]

[J09] Jun Yin, Pui-In Mak, Franco Maloberti, and Rui P. Martins, “A Time-Interleaved Ring-VCO with Reduced 1/f³ Phase Noise Corner, Extended Tuning Range and Inherent Divided Output,” IEEE Journal of Solid-State Circuits (JSSC), vol. 51, no. 12, pp. 2979-2991, Dec. 2016. [Download][IEEE Xplore link]

[J08] Sujiang Rong, Jun Yin, and Howard C. Luong, “A 0.05-to-10GHz, 19-to-22GHz, and 38-to-44GHz Frequency Synthesizer for Software-Defined Radios in 0.13-µm CMOS Process,” IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 63, no. 1, pp. 109-113, Jan. 2016.  [Download][IEEE Xplore link]

[J07] Md. Tawfiq Amin, Jun Yin, Pui-In Mak, and R. P. Martins, “A 0.07 mm2 2.2 mW 10 GHz Current-Reuse Class-B/C Hybrid VCO Achieving 196-dBc/Hz FoMA,” IEEE Microwave and Wireless Components Letters  (MWCL), vol. 25, no. 7, pp. 457-459, Jul. 2015. [Download][IEEE Xplore link]

[J06] Alvin Li, Shiyuan Zheng, Jun Yin, Xun Luo, and Howard C. Luong, “A 21–48 GHz Subharmonic Injection-Locked Fractional-N Frequency Synthesizer for Multiband Point-to-Point Backhaul Communications,” IEEE Journal of Solid-State Circuits (JSSC), vol. 49, no. 8, pp. 1785-1799, Aug. 2014. [Download][IEEE Xplore link]

[J05] Jun Yin, and Howard C. Luong, “A 57.5–90.1-GHz Magnetically Tuned Multimode CMOS VCO,” IEEE Journal of Solid-State Circuits (JSSC), vol. 48, no. 8, pp. 1851-1861, Aug. 2013. [Download][IEEE Xplore link]

[J04] Jun Yin, Jun Yi, Man Kay Law, Yunxiao Ling, Man Chiu Lee, Kwok Ping Ng, Bo Gao, Howard C. Luong, Amine Bermak, Mansun Chan, Wing-Hung Ki, Chi-Ying Tsui and Matthew Yuen, “A System-on-Chip EPC Gen-2 Passive UHF RFID Tag with Embedded Temperature Sensor,” IEEE Journal of Solid-State Circuits (JSSC), vol. 45, no. 11, pp. 2404-2420, Nov. 2010. [Download][IEEE Xplore link]

[J03] Fei Song, Jun Yin, Huailin Liao, and Ru Huang, “Ultra-Low-Power Clock Generation Circuit for EPC Standard UHF RFID Transponders,” IET Electronics Letters (EL), vol. 44, no. 3, pp. 199-201, Jan. 2008. [Download][IEEE Xplore link]

[J02] Cheng Li, Huailin Liao, Chuan Wang, Jun Yin, Ru Huang, Yangyuan Wang, “High-Q Integrated Inductor Using Post-CMOS Selectively Grown Porous Silicon (SGPS) Technique for RFIC Applications,” IEEE Electron Device Letters, vol. 28, no. 8, pp. 763-766, Aug. 2007. [Download][IEEE Xplore link]

[J01] Jun Yin, Xiaokang Shi, Ru Huang, “A new method to simulate random dopant induced threshold voltage fluctuations in sub-50 nm MOSFET’s with non-uniform channel doping,” Elsevier Solid-State Electronics, vol. 50, no. 9-10, pp. 1551-1556, Sep. 2006. [Download][Elsevier link]2

Conference

Conference paper highlights:

ISSCC (11 papers): [C02], [C08], [C09], [C10], [C11], [C12], [C18], [C19], [C22], [C23], [C24]

[C24] Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui P. Martins and Pui-In Mak, “A 23.2-to-26GHz Sub-Sampling PLL Achieving 48.3fsrms Jitter, -253.5dB FoMJ, and 0.55μs Locking Time Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase Alignment,” IEEE International Solid-State Circuit Conference (ISSCC), pp. 204-205, San Francisco, Feb. 2024. [Download][IEEE Xplore link]

[C23] Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Pui-In Mak, and Rui P. Martins, “A ULP Long-Range Active-RF Tag with Automatic Antenna-Interface Calibration Achieving 20.5% TX Efficiency at -22dBm EIRP, and -60.4dBm Sensitivity at 17.8nW RX Power,” IEEE International Solid-State Circuit Conference (ISSCC), pp. 470-471, San Francisco, Feb. 2023. [Download][IEEE Xplore link]

[C22] Xiangxun Zhan, Jun Yin, Pui-In Mak, and Rui P. Martins, “A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving −138dBc/Hz PN and 193.3dBc/Hz FoM at 10MHz Offset from 25.8GHz,” IEEE International Solid-State Circuit Conference (ISSCC), pp. 148-149, San Francisco, Feb. 2023. [Download][IEEE Xplore link]

[C21] Xi Meng, Junqi Guo, Haoran Li, Jun Yin, Pui-In Mak, and Rui P. Martins, “A 15.2-to-18.2GHz Balanced Dual-Core Inverse-Class-F VCO with Q-Enhanced 2nd-Harmonic Resonance Achieving 187-to-188.1dBc/Hz FoM in 28nm CMOS,” IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 1-2, Busan, Nov. 2021. [Download][IEEE Xplore link]

[C20] Jun Yin, Pui-In Mak, and Rui P. Martins, “A Periodically Time-Varying Inductor Applied to the Class-D VCO for Phase Noise Improvement,” IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 307-301, Grenoble, Sep. 2021. [Download][IEEE Xplore link]

[C19] Chao Fan, Jun Yin, Chee-Cheow Lim, Pui-In Mak, and Rui P. Martins, “A 9mW 54.9-to-63.5GHz Current-Reuse LO Generator with a 186.7dBc/Hz FoM by Unifying a 20GHz 3rd-Harmonic-Rich Current-Output VCO, a Harmonic-Current Filter and a 60GHz TIA,” IEEE International Solid-State Circuit Conference (ISSCC), pp. 282-283, San Francisco, Feb. 2020. [Download][IEEE Xplore link]

[C18] Gengzhen Qi, Haijun Shao, Pui-In Mak, Jun Yin, and Rui P. Martins, “A 1.4-to-2.7GHz FDD SAW-Less Transmitter for 5G-NR Using a BW-Extended N-Path Filter-Modulator, an Isolated-BB Input and a Wideband TIA-Based PA Driver Achieving <−157.5dBc/Hz OB Noise,” IEEE International Solid-State Circuit Conference (ISSCC), pp. 172-173, San Francisco, Feb. 2020. [Download][IEEE Xplore link]

[C17] Xiaolong Liu, Zhiqiang Huang, Jun Yin, and Howard C. Luong, “Magnetic-Tuning Millimeter-Wave CMOS Oscillators (Invited Paper),” IEEE Custom Integrated Circuits Conference (CICC), pp. 1-8, Austin, Aug. 2019. [Download][IEEE Xplore link]

[C16] Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, and Rui P. Martins, “Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm,” International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), pp. 15-18, Lausanne, July 2019. [Download][IEEE Xplore link]

[C15] Jun Yin, Xi Meng, Pui-In Mak, and Rui P. Martins, “Wideband MM-Wave CMOS VCOs – Switched Inductor, Mode-Switching Inductive Tuning, and Harmonic Extraction Techniques (Invited Paper),” International Conference on Microwave and Millimeter Wave Technology (ICMMT), pp. 1-3, Guangzhou, May, 2019. [Download][IEEE Xplore link]

[C14] Kai Xu, Jun Yin, Pui-In Mak, Robert Bogdan Staszewski, and R. P. Martins, “A 2.4-GHz Single-Pin Antenna Interface RF Front-End with a Function-Reuse Single-MOS VCO-PA and a Push-Pull LNA,” IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 293-294, Tainan, Nov. 2018. [Download][IEEE Xplore link]

[C13] Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, and Rui P. Martins, “Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications,” International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), pp. 129-132, Prague, July 2018. [Download][IEEE Xplore link]

[C12] Chee-Cheow Lim, Jun Yin, Pui-In Mak, Harikrishnan Ramiah, and Rui P. Martins, “An Inverse-Class-F CMOS VCO with Intrinsic-High-Q 1st– and 2nd-Harmonic Resonances for 1/f2-to-1/f3 Phase Noise Suppression Achieving 196.2dBc/Hz FoM,” IEEE International Solid-State Circuit Conference (ISSCC), pp. 374-375, San Francisco, Feb. 2018. [Download][IEEE Xplore link]

[C11] Shiheng Yang, Jun Yin, Pui-In Mak, and Rui P. Martins, “A 0.0056mm2 All-Digital MDLL Using Edge Re-extraction, Dual Ring-VCOs and a 0.3mW Block-Sharing Frequency-Tracking Loop Achieving 292fsrms Jitter and -249dB FoM,” IEEE International Solid-State Circuit Conference (ISSCC), pp. 118-119, San Francisco, Feb. 2018. [Download][IEEE Xplore link]

[C10] Jun Yin, Shiheng Yang, Haidong Yi, Wei-Han Yu, Pui-In Mak, and Rui P. Martins, “A 0.2V Energy-Harvesting BLE Transmitter with a Micropower Manager Achieving 25% System Efficiency at 0dBm Output and 5.2nW Sleep Power in 28nm CMOS,” IEEE International Solid-State Circuit Conference (ISSCC), pp. 450-451, San Francisco, Feb. 2018. [Download][IEEE Xplore link]

[C09] Wei-Han Yu, Haidong Yi, Pui-In Mak, Jun Yin, and Rui P. Martins, “A 0.18V 382μW Bluetooth Low-Energy (BLE) Receiver with 1.33nW Sleep Power for Energy-Harvesting Applications in 28nm CMOS,” IEEE International Solid-State Circuit Conference (ISSCC), pp. 414-415, San Francisco, Feb. 2017. [Download][IEEE Xplore link]

[C08] Jun Yin, Pui-In Mak, Franco Maloberti, and Rui P. Martins, “A 0.003mm2 1.7-to-3.5GHz Dual-Mode Time-Interleaved Ring-VCO Achieving 90-to-150kHz 1/f3 Phase-Noise Corner,” IEEE International Solid-State Circuit Conference (ISSCC), pp. 48-49, San Francisco, Feb. 2016. [Download][IEEE Xplore link]

[C07] Chee-Cheow Lim, Harikrishnan Ramiah,  Jun Yin, Pui-In Mak, and Rui P. Martins, “A High-Q Spiral Inductor with Dual-Layer Patterned Floating Shield in a Class-B VCO Achieving a 190.5-dBc/Hz FoM,” IEEE International Symposium on Circuits and Systems (ISCAS)pp. 1-4, Montreal, May 2014. [Download][IEEE Xplore link]

[C06] Jun Yin and Howard C. Luong, “A 0.37-to-46.5GHz Frequency Synthesizer for software-Defined Radios in 65nm CMOS,” IEEE Symposium on VLSI Circuits (VLSIC), Honolulu, pp. 96-97, June 2014. [Download][IEEE Xplore link]

[C05] Alvin Li, Shiyuan Zheng, Jun Yin, Xun Luo, and Howard C. Luong, “A CMOS 21-48GHz Fractional-N Synthesizer Employing Ultra-Wideband Injection-Locked Frequency Multipliers,” IEEE Custom Integrated Circuits Conference (CICC), San Jose, pp. 1-4, Sep. 2013. [Download][IEEE Xplore link]

[C04] Jun Yin and Howard C. Luong, “A 57.5-to-90.1GHz Magnetically-Tuned Multi-Mode CMOS VCO,” IEEE Custom Integrated Circuits Conference (CICC), San Jose, pp. 1-4, Sep. 2012. [Student Scholarship Award] [Download][IEEE Xplore link]

[C03] Jun Yin and Howard C. Luong“A 0.8V 1.9mW 53.7-to-72.0GHz Self-Frequency-Tracking Injection-Locked Frequency Divider,” IEEE Radio-Frequency Integrated Circuits Symposium (RFIC), pp. 305-308, Montreal, Jun. 2012. [Download][IEEE Xplore link]

[C02] Jun Yin, Jun Yi, Man Kay Law, Yunxiao Ling, Man Chiu Lee, Kwok Ping Ng, Bo Gao, Howard C. Luong, Amine Bermak, Mansun Chan, Wing-Hung Ki, Chi-Ying Tsui, and Matthew Yuen, “A System-on-Chip EPC Gen-2 Passive UHF RFID Tag with Embedded Temperature Sensor,” IEEE International Solid-State Circuit Conference (ISSCC), pp. 308-309, San Francisco, Feb. 2010. [Download][IEEE Xplore link]

[C01] Cheng Li, Huailin Liao, Chuan Wang, Jun Yin, and Ru Huang, “High-Q Integrated Inductor Using Post-CMOS Selective Grown Porous Silicon (SGPS) Technique for RFIC Applications,” IEEE Radio-Frequency Integrated Circuits Symposium (RFIC), pp. 167-170, Honolulu, Jun. 2007. [Download][IEEE Xplore link]

Book & Book Chapter

[B03] Shiheng Yang, Jun Yin, Pui-In Mak, and Rui P. Martins, “Multiplying DLLs,” in Phase-Locked Frequency Generation and Clocking: Architectures and circuits for modern wireless and wireline systems, pp. 645–664, The Institution of Engineering and Technology, 2020. [IET link]

[B02] Jun Yin,  “Ultra-Low Power Zigbee/BLE Transmitter for IoT Applications,” in Selected Topics in Power, RF, and Mixed-Signal ICs, pp. 315-337, River Publishers, 2018. [River link]

[B01] Howard C. Luong and Jun Yin, “Transformer-Based Design Techniques for Oscillators and Frequency Dividers,” Springer, Nov. 2015. [Springer link]